Design and Analysis of Multi-level Genetic Algorithm with its Application to the Construction of Clock Binary Tree

Genetic algorithm is an effective methodology for solving combinatorial optimization problems, and numerous researchers have undertaken efforts to many kinds of improvement of GAs in order to solve problems in computer science. The clock signal and clock skew become more and more important for the circuit performance in VLSI layout design. Since there are salient shortcomings in the conventional topology construction algorithms for designing a clock network, the multi-level model of clock binary tree is built in this paper, and the binary tree construction algorithm of clock signal based on multi-level genetic algorithm (MLGA) is presented. The experiments on random test cases and standard benchmark test cases show that multi-level genetic algorithm can produce much better clock network design in most cases when compared with conventional heuristic algorithms.